library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity spi is
port(
	CLOCK_50 : in std_logic;
	LEDR : out std_logic_vector(7 DOWNTO 0);
	SW : in std_logic_vector(7 DOWNTO 0);
	KEYS : in std_logic_vector(1 DOWNTO 0);
	SPI_IN : in std_logic;
	SPI_OUT : out std_logic_vector(5 DOWNTO 0);
	SPI_IN2 : in std_logic;
	SPI_OUT2 : out std_logic_vector(5 DOWNTO 0)
);
end entity spi;

architecture archi of spi is

	signal stateKey : std_logic := '0';			--state of the button
	signal buttonPushed : std_logic := '0';		--determines whether the button has been pushed	
	signal steady : std_logic := '0';			--waits for steadiness right after the board has been programmed
	signal countSteady : integer := 0;			--is going to trigger "steady"
	
	-------------------------------------------------------------------------------------------------------------------------------
	
	signal preStart : std_logic := '0';			--serves to wait for one clock cycle before restarting
	signal start : std_logic := '0';			--starts the SPI transmission
	signal whatToSend : integer := 0;			--selects what to send 
	
	signal count : integer := 0;				--for clocking the SPI
	signal TxIndex : integer := 0;				--SPI transmission index to synchronise the signals
	signal buffIndex : integer := 0;			--SPI buffer index
	signal endTx : std_logic := '0';			--indicates the end of transmission
	
	signal SCLK : std_logic := '1';				--clock of the SPI communication
	signal SDIN : std_logic := '1';				--data of the SPI transmission
	signal SYNC : std_logic := '1';				--slave select of the SPI transmission
	signal LDAC : std_logic := '1';				--DAC input that updates the DAC output
	signal CLR : std_logic := '1';				--Clear input of the DAC
	signal RST : std_logic := '1';				--Reset input of the DAC
	
	signal buff : std_logic_vector(23 DOWNTO 0) := "010010000000000000000100";
	
	-------------------------------------------------------------------------------------------------------------------------------
	
	signal preStart2 : std_logic := '0';		--serves to wait for one clock cycle before restarting
	signal start2 : std_logic := '0';			--starts the SPI transmission
	signal whatToSend2 : integer := 0;			--selects what to send 
	
	signal count2 : integer := 0;				--for clocking the SPI
	signal TxIndex2 : integer := 0;				--SPI transmission index to synchronise the signals
	signal buffIndex2 : integer := 0;			--SPI buffer index
	signal endTx2 : std_logic := '0';			--indicates the end of transmission
	
	signal SCLK2 : std_logic := '1';			--clock of the SPI communication
	signal SDIN2 : std_logic := '1';			--data of the SPI transmission
	signal SYNC2 : std_logic := '1';			--slave select of the SPI transmission
	signal LDAC2 : std_logic := '1';			--DAC input that updates the DAC output
	signal CLR2 : std_logic := '1';				--Clear input of the DAC
	signal RST2 : std_logic := '1';				--Reset input of the DAC
	
	signal buff2 : std_logic_vector(23 DOWNTO 0) := "010010000000000000000100";
	
begin

startSPI : process(CLOCK_50)

begin

	if(CLOCK_50 = '1' and CLOCK_50'event) then
		stateKey <= KEYS(0);
		
		if(steady = '0') then
			countSteady <= countSteady + 1;
			
			if(countSteady = 999) then
				steady <= '1';
			end if;
		end if;
		
		if(KEYS(0) = '1' and stateKey = '0' and buttonPushed = '0' and steady ='1') then
			start <= not(start);
			start2 <= not(start2);
			buttonPushed <= '1';
		end if;
	
		if(endTx = '1') then
			start <= '0';
			preStart <= '1';
		end if;
		
		if (preStart = '1') then
			start <= '1';
			preStart <= '0';
			
			if(whatToSend = 0) then
				whatToSend <= whatTosend + 1;
				buff <= "000000000000000000001000";
			else
				whatToSend <= 0;
				buff <= "111111111111111111111000";
			end if;
		end if;
		
		if(endTx2 = '1') then
			start2 <= '0';
			preStart2 <= '1';
		end if;
		
		if (preStart2 = '1') then
			start2 <= '1';
			preStart2 <= '0';
			
			if(whatToSend2 = 0) then
				whatToSend2 <= whatTosend2 + 1;
				buff2 <= "000000000000000000001000";
			else
				whatToSend2 <= 0;
				buff2 <= "111111111111111111111000";
			end if;
		end if;
		
	end if;

end process startSPI;

-----------------------------------------------------------------------------------------------------------------------------

SPI1 : process(CLOCK_50)

	constant prescaler : integer := 9; 	--sets the frequency of the SPI clock

begin

	if(CLOCK_50 = '1' and CLOCK_50'event and start = '1') then

		endTx <= '0';
		
		if(count < prescaler) then
			count <= count + 1;
		else
			TxIndex <= TxIndex + 1;
			count <= 0;
		end if;
		
		if (TxIndex = 0 and count = 0) then
			SYNC <= '0';
			
		elsif	(TxIndex <= 48 and count = 0) then
			
			if(TxIndex rem 2 = 1) then
				SDIN <= buff(buffIndex);
				buffIndex <= buffIndex + 1;
			end if;
	
			if(TxIndex >= 2) then
				SCLK <= not(SCLK);
			end if;
			
		elsif(TxIndex = 49 and count = 0) then
			SCLK <= '1';
			SDIN <= '1';
			SYNC <= '1';
			
		elsif(TxIndex = 50 and count = 0) then
			LDAC <= '0';
			
		elsif(TxIndex = 51 and count = 0) then
			LDAC <= '1';
			
		elsif(TxIndex = 52 and count = 0) then
			TxIndex <= -1;
			buffIndex <= 0;
			count <= 0;
			endTx <= '1';
		end if;	
	
	end if;

end process SPI1;

-------------------------------------------------------------------------------------------------------------------------------------
SPI2 : process(CLOCK_50)

	constant prescaler2 : integer := 9; 	--sets the frequency of the SPI clock

begin

	if(CLOCK_50 = '1' and CLOCK_50'event and start2 = '1') then

		endTx2 <= '0';
		
		if(count2 < prescaler2) then
			count2 <= count2 + 1;
		else
			TxIndex2 <= TxIndex2 + 1;
			count2 <= 0;
		end if;
		
		if (TxIndex2 = 0 and count2 = 0) then
			SYNC2 <= '0';
			
		elsif	(TxIndex2 <= 48 and count2 = 0) then
			
			if(TxIndex2 rem 2 = 1) then
				SDIN2 <= buff2(buffIndex2);
				buffIndex2 <= buffIndex2 + 1;
			end if;
	
			if(TxIndex2 >= 2) then
				SCLK2 <= not(SCLK2);
			end if;
			
		elsif(TxIndex2 = 49 and count2 = 0) then
			SCLK2 <= '1';
			SDIN2 <= '1';
			SYNC2 <= '1';
			
		elsif(TxIndex2 = 50 and count2 = 0) then
			LDAC2 <= '0';
			
		elsif(TxIndex2 = 51 and count2 = 0) then
			LDAC2 <= '1';
			
		elsif(TxIndex2 = 52 and count2 = 0) then
			TxIndex2 <= -1;
			buffIndex2 <= 0;
			count2 <= 0;
			endTx2 <= '1';
		end if;	
	
	end if;

end process SPI2;

--------------------------------------------------------------------------------------------------------------------------------

SPI_OUT(0) <= SCLK;
SPI_OUT(1) <= SDIN;
SPI_OUT(2) <= SYNC;
SPI_OUT(3) <= LDAC;
SPI_OUT(4) <= CLR;
SPI_OUT(5) <= RST;

SPI_OUT2(0) <= SCLK2;
SPI_OUT2(1) <= SDIN2;
SPI_OUT2(2) <= SYNC2;
SPI_OUT2(3) <= LDAC2;
SPI_OUT2(4) <= CLR2;
SPI_OUT2(5) <= RST2;

LEDR(0) <= start;

end architecture archi;